使用方法
- 复制安装命令，在自己的智能体环境安装前先检查源码包。
- 从原始文档核对所需工具、凭据和支持的宿主。
- 说明输入材料与期望交付物，并对照来源检查输出。
npx skills add https://github.com/mohitmishra786/low-level-dev-skills --skill adc-dac-baremetal开始前需了解
- 安装不包含模型订阅、API 额度或访问文件的权限。
- 仓库星数和安装量反映活跃情况，不等于独立质量或安全测试。
仓库原始内容
按源仓库内容呈现，保留标题、案例、代码、表格、链接以及原文引用的演示图片。
ADC and DAC (Bare-Metal)
Purpose
Configure ADC and DAC peripherals: channel selection, sampling times, calibration sequences, DMA circular buffers, and DAC static/dynamic output.
When to Use
- Reading analog sensors (temperature, voltage)
- Audio or control voltage output via DAC
- Continuous sampling with DMA
- Post-reset ADC calibration on STM32
Workflow
1. STM32 ADC single conversion
c
/* Enable ADC1 and GPIOA clock; PA0 analog mode */
ADC1->CR2 |= ADC_CR2_ADON;
for (volatile int i = 0; i < 10000; i++); /* stabilization — RM value */
ADC1->SMPR2 |= ADC_SMPR2_SMP0_2; /* 84 cycles sample time ch0 */
ADC1->SQR3 = 0; /* channel 0, 1 conversion */
ADC1->CR2 |= ADC_CR2_SWSTART;
while (!(ADC1->SR & ADC_SR_EOC))
;
uint16_t sample = ADC1->DR;Run ADC_Calibration() / ADC_CR2_RSTCAL/CAL per RM on F1/F4 families.
2. DMA circular ADC
c
/* ADC1 → DMA2 Stream0, circular mode into buffer[64] */
/* Configure DMA: periph-to-mem, halfword, increment mem, circular */
ADC1->CR2 |= ADC_CR2_DMA | ADC_CR2_CONT;
DMA2_Stream0->CR |= DMA_SxCR_EN;Half-transfer / transfer-complete IRQs for double buffering.
3. DAC output (STM32)
c
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
DAC->CR |= DAC_CR_EN1;
DAC->DHR12R1 = 2048; /* mid-scale 3.3V reference */4. Agent usage
/adc-dac-baremetal Set up ADC1 channel 0 with DMA circular bufferCommon Problems
| Symptom | Cause | Fix |
|---|---|---|
| Noisy readings | Short sample time | Increase SMP bits |
| Stuck EOC | Clock not enabled | RCC ADC enable |
| Wrong voltage | Vref not 3.3V | Measure VDDA; calibrate |
| DMA corrupt | Buffer alignment | Use uint16_t aligned buffer |
Related Skills
skills/baremetal/dma-baremetal— ADC DMA streamsskills/baremetal/timers-pwm-baremetal— ADC external triggerskills/baremetal/gpio-baremetal— analog pin mode
