mohitmishra786/low-level-dev-skills

protocol-analysis

Protocol analysis skill for serial bus debugging.

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How to use

  1. Copy the installation command and review the source package before installing it in your own agent environment.
  2. Check the source document for required tools, credentials and supported hosts.
  3. Describe your input and desired deliverable; review the output against the source material.
npx skills add https://github.com/mohitmishra786/low-level-dev-skills --skill protocol-analysis

Before you start

  • Installation does not include a model subscription, API allowance or permission to access your files.
  • Repository stars and installation counts describe activity, not an independent quality or security test.
Original skill document

Rendered from the source repository. Headings, examples, code, tables, links, and referenced images are preserved.

Protocol Analysis (I2C / SPI / UART)

Purpose

Guide agents through software-side serial bus analysis: logic analyzer workflow, sigrok/PulseView decoding, correlating captures with firmware drivers, and Python-based parsing — bridging skills/baremetal/spi-i2c-baremetal and hardware bring-up.

When to Use

  • Sensor not responding — verify clock and data on bus
  • Compare kernel driver transactions vs datasheet
  • Document expected transaction format for CI/regression
  • Teaching protocol layers without expensive lab gear (sim + decode)

Workflow

1. Capture stack

Physical probe → logic analyzer hardware (or GPIO bit-bang)
├── sigrok-cli / PulseView GUI
├── Protocol decoder (i2c, spi, uart)
└── Export VCD/CSV for scripts

Open-source: sigrok with cheap FX2LA boards.

2. PulseView quick start

bash
# List devices
pulseview

# CLI capture (device-dependent)
sigrok-cli --driver fx2lafw --config samplerate=1MHz \
  --channels 0=SDA,1=SCL \
  --samples 1m \
  --protocols i2c

3. I2C decode expectations

PhaseLines
STARTSDA fall while SCL high
Address + R/W7 bits + ACK
Data bytesACK per byte
STOPSDA rise while SCL high

NACK at address → wrong 0x48 or device held in reset.

4. SPI decode

Check mode (CPOL/CPHA), bit order (MSB first typical), CS polarity, and word size. Compare to spi_setup() in skills/kernel-dev/bus-drivers-i2c-spi.

5. UART decode

Set baud (9600/115200), frame (8N1), and signal polarity. Async — sample rate must be ≥ 4× baud for LA.

6. Python post-process (csv)

python
import csv

with open("capture.csv") as f:
    for ts, ch0, ch1 in csv.reader(f):
        # edge detect, reconstruct bits
        pass

7. Correlate with firmware

Logic capture timestamp
├── Match driver reg write sequence
├── Compare inter-byte delay vs datasheet max
└── Flag extra clock pulses (mode fault)

8. Agent usage

/protocol-analysis Decode this I2C capture — device NACKs after register 0x0F write

Common Problems

SymptomCauseFix
Garbage decodeWrong samplerate≥ 4× bus speed
Floating linesMissing pull-upsEnable internal pull or external
SPI shifted bitsMode mismatchCPOL/CPHA table from RM
UART framing errorsBaud driftMeasure actual bit time
No decoderMissing sigrok buildInstall sigrok-cli + decoders

Related Skills

  • skills/baremetal/spi-i2c-baremetal — firmware-side protocol
  • skills/baremetal/uart-serial-baremetal — UART config
  • skills/kernel-dev/bus-drivers-i2c-spi — kernel transactions
  • skills/profilers/strace-ltrace — userspace syscall trace analog
  • skills/embedded/openocd-jtag — scope alongside SWD debug

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